微芯片CLB的逆向工程

微芯片CLB的逆向工程
Reverse Engineering the Microchip CLB

Microchip为新的PIC16F13145微控制器系列添加了一个非常酷的外围设备，称为可配置逻辑块（CLB）。它本质上是一个可以连接到芯片内部的小型FPGA（32个LUT）。然而，他们并没有记录如何自己配置它，只是向您介绍他们的在线配置工具，该工具将作业提交给API，该API放置并路由到LUT。[CLB]接口在寄存器映射中不显示为SFR，用户也不能直接访问；它只能通过支持CLB编程的Microchip MPLAB®集成开发环境（IDE）等编程系统访问。-PIC16F13145数据表所以我决定自己进行逆向工程！分为3个部分：

这篇黑客新闻讨论了一个逆向工程的Microchip CLB（可配置逻辑块）及其有限的文档。原始文章详细介绍了这种硬件的逆向工程，但用户对32个LUT（查找表）的有限数量表示质疑。评论者建议，尽管CLB的尺寸很小，但它可用于专用通信协议、IO行为卸载CPU轮询（如SPI或BiSS-C）、内存映射、基本加密和简单的有限状态机。一位用户强调了Microchip使用26个LUT的交通灯控制器的例子。一个关键问题是缺乏直接的配置文档，Microchip将用户推向基于云的配置工具，突显了嵌入式开发中日益增长的“SaaS化”趋势。

Microchip added a very cool peripheral called the Configurable Logic Block (CLB) to there new PIC16F13145 microcontroller family. It’s essentially a small FPGA (32 LUTs) that can connect to the internals of the chip.

However, they don’t document how to configure it yourself, only referring you to their online configurator tool that submits jobs to an API that places and routes to LUTs.

The [CLB] Interface does not appear as an SFR in the Register Map and is not directly user-accessible; it is accessible only through a programming system such as Microchip MPLAB® Integrated Development Environment (IDE) that supports programming the CLB. - PIC16F13145 Datasheet

So I decided to reverse engineer it myself!

Broken into 3 parts:

微芯片CLB的逆向工程 Reverse Engineering the Microchip CLB

微芯片CLB的逆向工程
Reverse Engineering the Microchip CLB