6502 作为服务
6502 as a Service

原始链接: https://www.emulationonline.com/systems/chiplab/6502-lab-available/

6502 Chiplab 提供独特的“6502 作为服务”体验,允许用户在真实的 6502 芯片上运行程序并观察其行为。您可以上传汇编代码或预先组装好的程序,这些程序随后会被排队执行。每次运行大约持续一秒钟(100 个周期),系统会提供地址总线和数据总线的详细跟踪。这为测试和调试 6502 程序提供了比模拟器更精确的替代方案。 该平台旨在了解芯片行为以创建更好的模拟器,特别是针对文档不足的系统。通过分析执行期间的总线活动,开发人员可以构建芯片功能的精确数字模型。创建者寻求对 Github 上的 6502_model 存储库的贡献,该存储库使用 Rust 来模拟芯片的行为。这个项目是朝着模拟具有嵌入式 6502 处理器的更复杂系统的垫脚石。

这篇 Hacker News 的帖子讨论了“6502即服务 (6502 as a Service)”——一个在线模拟器,允许用户观察6502芯片的内部运行。尽管6502的运作机制已被充分记录,但该项目的目标是创建一个系统,以便将来分析那些不太为人所知的芯片。评论者 utopcell 承认当前版本的实际用途有限,称其为一个“因为我们可以(because we can)”的项目,但同时赞扬了其出色的工作和未来的潜力。另一位评论者 JojoFatsani 开玩笑地询问了运行模拟器的实例类。总的来说,该帖子承认了该项目目前的新颖性价值,同时也强调了其作为逆向工程工具和理解更复杂、文档更少的芯片的潜力。

原文
6502 Lab Available - Emulation Online

Run your programs against a real 6502. 6502 As A Service.

The 6502 is now available in the Chiplab! This allows you to upload your programs to be queued for running against a real 6502 chip. For each cycle of execution, you can observe the values of all the busses of the physical chip.

This can be used in place of an emulator for a highly accurate way to test your 6502 programs. It can also be used to research the behavior of this chip, which I believe will be an effective way of developing highly accurate emulators. Towards the end of the article I’ll share a repo in case you’d like to help.

You can run your programs against a real 6502 chip today. The rest of this post will cover some technical details involved in getting the chip online.

Using the 6502 Chiplab.

The system is designed to allow you to write code in assembly language, or upload your pre-assembled programs. These will be queued for execution on the chip. After it is your turn, your program will be allowed to run for 100 cycles, which takes around 1 second.

Once your program is finished running, you will be provided with a trace. This shows the values of the address(16 bits) and data(8 bits) busses. Your programs can write to memory if you want to see some result captured in the trace.

How does it work?

The 6502 interacts with all peripherals though the memory bus. The 6502 has some internal state that cannot be viewed directly, but otherwise can be throught of as reading and writing from memory repeatedly.

The system, included the 6502 and other peripherals like memory, is synchronized through a signal called the clock. When the clock signal changes, all connected peripherals take this as a signal that they can do one extra step of work. At each change of the clock, the chiplab monitors the address bus, and updates the data bus to provide the value corresponding with your program at that address. In this way the lab simulates the surrounding environment for the 6502.

Sort of like “The Matrix” but for the 6502. You can read more about the details in this previous post on emulating program rom for the 6502.

Why do this?

Through these reads and writes, we can get glimpses into the internal operation of the chip. Now for the 6502 this is a bit unnecessary, as the internal operations of the chip are already well known.

But there are many systems for which the inner workings are not well understood. This chiplab, initially tested with the 6502, should provide a way to learn and build models for these less well understood chips.

Attempting to rebuild a 6502 with this setup is sort of a test for more advanced systems in the future. Help wanted.

There are also at least a few chips which involve an embedded 6502 and some other custom electronics. So building the 6502 is a direct stepping stone for modeling those other chips too.

Building a digital 6502 model

The behavior of the real test can be used to generate test cases for a simulated version of this chip. Fortunately, the 6502 (and most other ICs) have many pieces of independent functionality. This allows a virtual representation of the chip to be up incrementally.

Small isolated tests, such as those for a single instruction, can be created by writing 6502 programs that use only that instruction. By capturing a cycle-by-cycle trace of the busses as a real chip runs, we know what the behavior of our model should look like.

Want to help? Take a look at the 6502_model repository on Github. The model is written in a simple subset of Rust. The goal is to capture the behavior of the system, not necessarily build something that can be synthesized for silicon. Traditional programming languages are much more expressive than typical hardware description languages (HDL). Even if you dont know Rust, most of the logic should be easy to follow if you have experience with one other programming language.

Questions / comments? Send me an email, which you can find in the site footer. Thanks for reading!




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