![]() |
|
![]() |
| ESP32 chips also need external SPI Flash, and many STM32 have little flash and QuadSPI with execute from external flash capabilities, so I don't see this as a specificity of RP2040. |
![]() |
| Turns out you can actually run quite a lot with dual core CPU clocked at 250MHz. You can also use part of the flash as file system, but that's not quite as straight forward. |
![]() |
| This confuse us foreigners trying to use the English language even more than it must confuse regular english speakers.
Not only did you (you guys, y'all, plural you, whatever...) mix up ye with you, using only the object form, but also started using it for thou and thee. Also, it was thy/thine not yours in the singular form. I suggest you "fix" your language by reintroducing these words, they (plural they) are not completely lost yet (ref: dialects and the Bible). https://langeek.co/en/grammar/course/8/archaic-pronouns#revi... |
![]() |
| What I find quite interesting is in the northern irish dialect, plural you is quite uncommon, usually plural you becomes yous or yousins, because irish has seperate words for singular and plural you |
![]() |
| Maybe it's used neutrally in greetings (e.g. "Hi guys,") but when referring to someone specific, if you say they're a guy, it will generally be assumed that person is a man. |
![]() |
| The flippydrive is such a nice, clean install on a gamecube that it leaves me wondering if the rp2040 could make better ODE's for every other console (psx, saturn in particular) |
![]() |
|
I assume by home soldering friendly, you mean too small. I'll make a case for why this isn't a bad thing...If it's difficult to solder a QFN package, then it will be equally difficult to solder the passives and flash it requires. Its price, availability, and good documentation make up for the package by creating an ecosystem of cheap boards hobbyists can use instead. For example, I designed a keyboard around the Solder Party RP2040 Stamp (https://www.solder.party/docs/rp2040-stamp/). It integrated all the difficult components in a package that fit between the arrow keys and delete key. |
![]() |
| Many, many cheap MCUs have peripherals that can decode quadrature in hardware. E.g, PCNT on ESP32, timer modes on STM32 etc. Might as well use PIO to implement I2C or UART :) |
![]() |
| I heavily disagree. I‘ve been working with the Espressif ecosystem for a couple of months now and it‘s the best documented microcontroller platform out there. |
![]() |
| You need to carefully select JLC basic parts. QSPI, XOSC, etc. can all be had without paying fees. I've ordered 5+ boards with RP2040s that have come out to "cheaper than Pico" prices. |
![]() |
| probably so, but crote was talking about external fram chips
the msp430fr4132 you linked costs 160¢ in quantity 35, which is actually considerably cheaper than comparable flash-based chips like the msp430f233 https://www.digikey.com/en/products/detail/texas-instruments... which is 500¢ in quantity 25. so that's maybe one reason people would use fram: evidently it's cheaper than nor? but i'm pretty sure there are μcs with 8k of nor flash that are cheaper than that and in fact cheaper than the price difference. is this pricing policy some sort of loss leader by ti to drive fram adoption? it seems unlikely. does using fram instead of nor make it cheaper for ti to make the chip? surely 8k of nor couldn't account for such a large cost on further investigation, i don't find μcs with 8k of nor flash that are cheaper than that, at least in stock at digi-key and still in production. https://www.digikey.com/en/products/filter/embedded/microcon... is the link to my search, which i trust hn will abbreviate in a useful way. but lcsc has the ch32v203 in stock for 39¢ in quantity 100 https://www.lcsc.com/product-detail/Microcontroller-Units-MC... and that has 20k of sram, 64k of flash (presumably nor!), and 24 gpios. that's half the gpios of the ti chip, but i believe my digi-key search linked above was not limited by pin count so maybe the only reason fram costs more is that ti doesn't license the fram patents to chinese companies? it still beggars belief that ti (and microchip, st, etc.) would be spending three dollars a chip on 8k of nor, or even three dollars a chip divided by two layers of profit margin |
![]() |
| What do you mean by USB-C PHY? USB-C is the connector, and you can run USB 1.1/2.0/3.0/3.1 through it, but realistically a RP2040 can not feed even a USB 2.0 PHY. |
![]() |
| > The RPI2040 is JUST the chip whereas the ESP32 come with tons of peripherals for your liking.
I think you're mistaking the ESP32 devkits for the ESP32 itself. The thing that comes with an antenna, battery controller and any kind of connector whatsoever is a devkit or at least a module. The ESP32 itself is a small IC just like the RP2040. For example you might be thinking of a devkit like this: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s... Which is itself based on a module (e.g. ESP32-S3-WROOM-1), which just bundles the ESP32-S3 IC with a few niceties (like wifi antenna or connector). The equivalent for the RP2040 would be the Raspberry Pi Pico, which does come with some minor niceties (like a wifi variant). There are other products that package it with different peripherals. > So you are comparing the first of its kind SOC with a decade old Family of SBCs. Neither the RP2040 nor ESP32 series are SBCs and neither has any SBC lineage. The Raspberry Pi SBCs were all Broadcom based, the RP2040 is a brand new IC developed by Raspberry Pi and afaik has no IP licensed by Broadcom. |
![]() |
| > It is an extremely weird situation, and a deeply bad look
I never followed all the ins and outs but from having a quick look through the comments on https://github.com/platformio/platform-raspberrypi/pull/36 the following happened:
Ultimately maintaining things isn't free. RPi have chosen the development environment(s) they wish to support and it hasn't included PlatformIO. What's weird or a bad look? |
![]() |
| > Besides rent-seeking, what reason could justify preventing the community from maintaining features/microcontrollers that the organization is unwilling to (due to costs)?
Platformio I suspect. |
![]() |
| A non-zero number of engineers will implement "hello world" wrong when they're first learning a language. That's not an argument against any given programming language either. "I made a design error that the documentation specifically calls out as something to avoid" doesn't hold much water as a legitimate criticism. Especially when the design error is "I didn't put the decoupling cap very close to the pin it's supposed to be decoupling for". (as an aside, you should read the "minimal design example" chapter from the RP2040 Hardware Design Guide[0], even if you have zero intention of designing with the chip. It's a literal masterclass in beginner-level pcb design.)
Literally none of this is actually a hazard if you design more than one PCBA with a microcontroller on it in your entire life. I'd argue that designing around a castellated-edge module is much MUCH harder to get right on the first try than discrete components, even though the parameter space is apparently much smaller. 0. https://datasheets.raspberrypi.com/rp2040/hardware-design-wi... |
![]() |
| Honestly you just don't need platformio for programming esp32. I tried, and it was just easier to deal with esp-idf than have a middleware with its own quirks on top of esp-idf's own quirks. |
![]() |
| TI's MSPM0G350x (also a low-cost Cortex-M0+ design) runs full-tilt at 8mA, STOP-sleeps at 400uA, STANDBY-sleeps at 5uA, and SHUTDOWN-sleeps at 80nA.
https://www.ti.com/lit/ds/symlink/mspm0g3507-q1.pdf -------- RP2040's full-speed is okay. 20+mA is a lot but it is easily explained by the absurdly huge SRAM banks it has. But RP2040's sleep states are absolutely AWFUL. The Cortex-M0+ chips are all extremely power-competitive vs each other, because Cortex-M0+ is extremely low-end with regards to core-design. You're pretty much only getting a Cortex-M0+ because its the absolute minimum 32-bit processor on the market. (8-bitters and 4-bitters exist if you're willing to go even lower-end, but Cortex-M0+ is the bottom of ARM's offerings). So low-power seems to be a must in this market, IMO anyway. If you're willing to use higher amounts of power, you really should get a few more features, like an FPU on the Cortex-M4. |
![]() |
| So how can one start with doing something useful with this sort of things. Let’s say I have backend experience, some spare cash and time to try to get into embedded |
![]() |
| For tutorials and hardware, check out Adafruit. If you’re okay with less polished documentation, also look into M5Stack (they are really cheap on AliExpress).
I currently work in e-commerce using Ruby on Rails, which I really enjoy. However, I do miss my previous work on the weird side of software and electronics for art installations on galleries and events[0]. If anyone wants to chat about or pair on embedded development, feel free to reach out to me at my username at hey.com. [0]https://vimeo.com/389519079 |
![]() |
| In general, read-out protection provides a very limited level of protection that I wouldn't rely on to stop cloning. There's quite a few firms that will extract the firmware from protected microcontrollers for a couple thousand dollars (i.e. https://russiansemiresearch.com/ ) which is a drop in the bucket considering the potential profit from industrialized cloning. Lots of microcontroller series also have exploits that can allow hobbyists with very little funding to bypass read-out protection (here's one for the STM32F0 series for example: https://github.com/racerxdl/stm32f0-pico-dump ).
|
![]() |
| How are people using this in practice?
I’ve never worked with a BGA device. I’m guessing you need to design a board send it to say pcbway and then have the equipment to solder the bga in? |
![]() |
| > Decoupling capacitors need to be placed "close" to the chip
All of these rules are just rules of thumb. The "rule" is that your Power Delivery Network (PDN) needs to have low-enough impedance to function properly. High parallel capacitance and low series inductance/resistance. Longer leads increases inductance and resistance so closer is preferred. But for even 100MHz designs, you're well under the size where 100mil or 0805 would cause any serious problem. ------------- So the "secret" is that all faster designs (100MHz to 300MHz) have substantial on-package capacitance. Take a look at this design, which I admit is Microchip/Atmel MCU, but its running at 300MHz and not just the relatively low 133MHz of the RP2040. https://lcamtuf.coredump.cx/bob-the-cat/ Those are LARGE 1206 1uF capacitors. Which is actually scary to me because we're not looking at tight 100nF decoupling caps anymore but instead substantially relying upon "on-package" capacitance. Still, it shows that lcamtuf was confident in this 300MHz processor handling far-away 1206 capacitors, showing how much wiggle room we have in practice in these designs. You shouldn't worry about 100mil of movement of 0805 caps on a 133MHz design. After all, there are real designs that are closer to 500 mil that use 1206 caps on a 300MHz MCU. -------- I'm honestly scared for lcamtuf here and would never design a board like this. But I'm really not worried about 0805 caps on relatively low speed 100MHz (or even 133MHz) MCUs. Especially if you're properly "teaming" them up so that their resistances are paralleled and inductances are paralleled. (Notice that lcamtuf's 300MHz design doesn't even have the 10x recommended parallel 100nF capacitors close to any of the pins!! He's really stretching the specs) ----------- But yeah, my personal preference is majority of 0805s and 0603s for the "close" decoupling capacitors. I know there's plenty of wiggle room here (even if I'm not as aggressive as lcamtuf's designs). If you're using PCBA from another shop, I guess its all "free" to you to use 0402s or whatever they got loaded in their chip-shooters. So might as well take your free pre-loaded resistors. But if I'm assembling a board myself, I definitely prefer the larger size. |
![]() |
| The professionals use PCB-design software with physical modeling / FEA to calculate estimates to all of the important parameters of the circuit board (including how much trace lengths matter... but also board-capacitance, resistances, and resonance frequencies of the board itself, etc. etc.)
In contrast, we hobbyists deal with "rules of thumb", because none of us will spend $4000+ on professional PCB software that run these calculations for us. And furthermore, we aim very conservative because its very difficult to debug a PCB layout issue... as we hobbyists are functionally blind to all of these issues (ex: trace inductance, trace capacitance, or other issues). I think spending a good bit of time on PDN / grounding / etc. etc. study is very worth your while. https://www.youtube.com/watch?v=ySuUZEjARPY 2+ hour talk on just the issue of good "grounding" design in PCBs, but it does relate to this issue of capacitors, trace-lengths and the like. I feel like you'd benefit from this talk. The "correct" way of thinking is exceptionally complex, far more complex than what is taught in colleges. But you have all the basic ideas thanks to the old rules of thumb. You just need to take the next step to see what the problems are. -------- And as you'll see, traces on the same side of a board are cake. Its things like vias that actually wreck you. |
![]() |
| Pololu's stencils leave much to be desired. They do work but I feel like https://www.oshstencils.com/ makes a higher quality stencil instead at similar prices.
----- Note that BGA chips mostly come pre-soldered / solder balls. You also design PCBs so that there is a "well" for the balls to melt into and settle into place, and molten-solder has a significant amount of surface tension, so you can magically watch the solder "pull" your designs into place. Of course, the OP is likely talking about QFN not BGA, but... just in case people are worried about BGAs its not terrible... (its just impossible to inspect a BGA XRays). The surface-tension can be harmful in the case of tombstoning (ex: a resistor or capacitor with two leads, especially a "sideways" low-inductance capacitor, will get "pulled up" by one side, lifting off the 2nd pad). If you have a solder-plate + hot-gun, you can "feel" the surface tension by just grabbing a toothpick and pushing on these components as they're still hot. You'll find the pressure to be far higher than you expect. |
![]() |
| BGA you need hot air and reflow but a QFN I think you can just position and solder by the side with a simple solder iron with a knife like tip. |
![]() |
| I'm speaking from experience, I built two boards with the rp2040 before I decided to stop using it.
The pin flexibility is nice, I agree with you there. But I spend more time dealing with the flash chip than that saves me. I don't want more capability. An STM32 M3 has far far more processing throughput than I need for 99.9% of what I do. I want the smaller thing, even if it isn't cheaper. It is sufficient. I love stm32s because I can write bare metal C without using any of stmicro's libraries at all (except the one header defining the register offsets). Here's an example: https://github.com/jcalvinowens/ledboard/blob/master/firmwar... The rp2040 is not set up to easily let you do minimalist stuff like that. And after all, why would they go to the trouble? You have 16MB of flash to waste on library code you never call... it's like buying a mack truck to commute to work. I'll also echo the other comment about the cache: if you actually have megabytes of .text, you're gonna have a bad time. |
![]() |
| Unbrickable for the RP2040 itself, but most SPI flash chips (including ones on the RP Pico) have permanently lockable regions. You can lock them open though. |
The PIO's really are the star of the RP2040 show, giving it a capability that competing chips like the ESP32 can't match. They are appearing all over the place in the console hacking space for this reason. Lower power consumption in steep modes for battery-backed applications would be a welcome addition in any V2 version though.