Most low end DRAMless controllers run in full disk caching mode. In other words, they first write *everything* in pSLC mode until all cells are written, only after there are no cells left they go back and rewrite/group some cells as TLC/QLC to free up some space. And they do it only when necessary, they don't go and do that in background to free up more space.

So, if you simply create a partition 1/3 (for TLC) or 1/4 (for QLC) the size of the disk, make sure the remaining empty space is TRIMMED and never used, it'll be always writing in pSLC mode.

You can verify the SSD you're interested in is running in this mode by searching for a "HD Tune" full drive write benchmark results for it. If The write speed is fast for the first 1/3-1/4 of the drive, then it dips to abysmal speeds for the rest, you can be sure the drive is using the full drive caching mode. As I said, most of these low-end DRAMless Silicon Motion/Phison/Maxion controllers are, but of course the manufacturer might've modified the firmware to use a smaller sized cache (like Crucial did for the test subject BX500).

To verify the drive uses the all of the drive as a cache, you can run full drive sequential write test (like the one in HD Tune Pro) and analyze the speed graph. If, say, a 480GB drive writes at full speed for the first 120GB, and then the write speed drops for the remaining 360GB, this means the drive is suitable for this kind of use.

I think controllers might've been doing some GC jobs to always keep some amount of cells ready for pSLC use, but it should be a few GBs at most and shouldn't affect the use case depicted here.

But you’re most probably doing this on a device with nothing valuable on it, so you should be able to just trim the whole thing and then allocate and format whatever piece of it that you are planning to use.

On Linux, blkdiscard can be used in the same manner (create a dummy partition and run blkdiscard on it ex. *blkdiscard /dev/sda2).

It depends on 'issue_discards' being set in the config

This has drifted over time. I haven't quite rationalized why. Hoping someone can remind me if nothing else, away from a real computer for a bit.

No, that's not how it works. SLC caches are used primarily for performance reasons, and they're faster precisely because they aren't doing the equivalent of writing four ones (and especially not seven!?) to a QLC cell.

In other words, this mod doesn't only mean you get extreme endurance, but retention. This is usually specified by manufacturers as N years after M cycles; early SLC was rated for 10 years after 100K cycles, but this QLC might be 1 year after 900 cycles, or 1 year after 60K cycles in SLC mode; if you don't actually cycle the blocks that much, the retention will be much higher.

I'm not sure if the firmware will still use the stronger ECC that's required for QLC vs. SLC even for SLC mode blocks, but if it does, that will also add to the reliability.

However the write endurance (the amount of data you can write to the SSD before expecting failures) increases from 120TB to 4000TB which could be a very useful tradeoff, for example if you were using the disk to store logs.

I've never seen this offered by the manufacturers though (maybe I haven't looked on the right place), I wonder why not?

From what I can see, he seems to be taking the 120TBW that the OEM warranties on the drive for the initial result, but then using the NAND's P/E cycles spec for the final result, which seems suspicious.

The only thing that I could be missing is the NAND going to pSLC mode somehow increases the P/E cycles drastically, like requiring massively lower voltage to program the cells. But I think that would be included in the WAF measure.

What am I missing?

and you can't choose.

but yeah, I'm the delusional one and the industry is very sane and carrying for the wishes of the consumer. carry on.

But where you want endurance is for a ZIL SLOG (the write cache, effectively). Optane was great for this because of really high endurance and very low latency persistent writes, but, ... Farewell, dear optane, we barely knew you.

The 400GB optane card had an endurance of 73 PB written. Pretty impressive, though at almost $3/GB it was really expensive.

This would likely work but as a sibling commenter noted, you're probably better off with a purpose-built, high endurance drive. Since it's a write cache, just replace it a little early.

Terrific for a hobby project, build farm, or even a business in a prototype stage (buy 3-4 then).

Hardly acceptable in a larger setting where continuity in 10 years is important. Of course, not the exact same part available in 10 years (which is not unheard of, though), but something compatible or at least comparable.

A dead-end product on clearance sale isn't the right choice for projects where you need to keep a specific mission-critical machine running for a decade straight. But for a lot of projects, all that really matters is that in a few years you can set up a new system with equal or better performance characteristics and not need to re-write your application to work well on the new hardware. I think all of the (vanishingly few) scenarios where Optane NVMe SSDs make sense fall into the latter category. (I feel sorry for anyone who invested significant effort into writing software to use Optane DIMMs.)

Not long ago, 64GB SSDs were the bare minimum you could get away with, and only the most expensive setups had 64GB RAM. Now we’re seeing 64GB modules for consumer laptops priced reason cheap.

I wonder: if RAM prices head towards $0.05/GB (around $50 for the cheapest 1TB) that we’re currently seeing for SSDs, would that allow the dream of a legitimately useful RAM disk to become a reality?

Become? I strongly doubt it.

You can make a great RAM disk today, but if you don't find that useful enough then the future isn't going to make it much better.

In that future, you don't need a RAM disk for your 800GB compile folders to live in cache or for your zero-loading-screen games to stream data at 50GB/s off your PCIe 7.0 drive.

This gives you 120GB with 4000TB write endurance, but you can buy a 4TB TLC drive with 3000TB write endurance for $200.

I’d be fascinated to hear any potential use cases for that level of endurance in modern data storage.

All flash arrays. Saying that, as I have a bunch of smaller (400GB) 2.5" SAS SSDs combined into larger all-flash arrays, with each one of those SSD's rated for about 30PB of endurance.

I'm expecting the servers to be dead by the time that endurance is exhausted though. ;)

By which point, they will be replaced for some new tech that will be cheaper, faster and more reliable and power efficient.

After a few minutes of loading data, the kernel calmed down and it worked like a champ. Millions of transactions per second across billions of records, on a $500 computer... and a card that cost more than my car.

Definitely wouldn't do it that way these days, but it was an impressive bit of kit.

Somehow we end up with a FusionIO card in tow. We go from something like 5,000 read QPS to 300k reads QPS on pgbench using the cheapest 2TB card.

Ever since then, I’ve always thought that reaching for vertical scale is more tenable than I originally thought. It turns out hardware can do a lot more than we think.

But the tricky bit there is that you may need to set up the response to contain the results of the read that is triggered by a successful write. Otherwise you have to solve lag problems on the replica.

Not to mention that individual servers, no matter how expensive, cost a tiny fraction of the equivalent cloud.

Remember the LMAX Disruptor hype? Their pattern was essentially to funnel all the data for the entire business logic onto one core, and make sure that core doesn't take any bullshit - write the fastest L1-cacheable nonblocking serial code with input and output in ring buffers. Pipelined business processes can use one core per pipeline stage. They benchmarked 20 million transactions per second with this pattern - in 2011. They ran a stock exchange on it.

As an experiment, I sent them a 600GB Intel SSD in laptop drive form factor. They took down the secondary node, installed the SSD, and brought it back up. We let DRBD sync the arrays, and then failed the primary node over to this SSD node. I added the SSD to the logical volume, then did a "pvmove" to move the blocks from the 8 drive array to the SSD, and over the next few hours the load steadily dropped down to nothing.

It was fun to replace 8x 3.5" 10K drives with something that fit comfortably in the palm of my hand.

In mass-production quantities, programming houses can preconfigure this and any other eMMC settings for you.

This mod (I only just skimmed the post) provides a longer life not by using the cells less often (or keeping more in reserve), but by extending each cells life by decreasing the tolerance of charge needed to store the state of the cell, but in return decreasing the bits that can be stored in the cell so decreasing the capacity.

If it's left ambiguous then it's either QLC, or a lottery where the "same" model may be TLC or QLC.

So, returning to previously mentioned ones, from their respective datasheets:

    - 870 EVO: Samsung V-NAND 3bit MLC
    - 980 Pro: Samsung V-NAND 3bit MLC
    - 990 Pro: Samsung V-NAND TLC
    - KC3000: NAND: 3D TLC
    - NV2: NAND: 3D // Explicit Lottery.

The first is that only weird tech people are interested in doing this. Then they might as well allow it because it's a negligible proportion of the market but it makes those customers favor rather than dislike your brand, and makes them more likely to recommend your devices to others, which makes you some money.

The second is that it would be widely popular and large numbers of customers would want to do it, and thereby choose the drives that allow it. Then if Samsung does it and SanDisk doesn't, or vice versa, they take more of the other's customers. Allowing it is the thing makes them more money.

Meanwhile the thing that trashes most SSDs isn't wear, it's obsolescence. There are millions of ten year old QLC SSDs that are perfectly operational because they lived in a desktop and saw five drive writes over their entire existence. They're worthless not because they don't work, but because a drive which is newer and bigger and faster is $20. It costs the manufacturer nothing to let them be more reliable because they're going in the bin one way or the other.

The status quo seems like MBAs cargo culting some heuristic where a company makes money in proportion to how evil they are. Companies actually make money in proportion to how much money they can get customers to spend with them. Which often has something to do with how much customers like them.

https://www.slashgear.com/sandisk-ships-worlds-first-memory-...

But that it doesn't really matter what people were using 10 years ago is the point. Devices from that era are of negligible value even if they're perfectly operational because they're tiny and slow.

The point you raise is a different one -- maybe you have an old device and you don't want to use it, you just want to extract the data that's on it. Then if the bits can no longer be read, that's bad. But it's also providing zero competition for new devices, because the new device doesn't come with your old data on it. The manufacturer has no reason to purposely want you to lose your data, and a very good reason not to -- it will make you hate them.

Using a mode other than SLC with current SSDs is insane due to the difference with planar NAND features, as the current 3D-NAND consumes writes for everything.

3D-NAND, To read data consume writes [0],

    " Figure 1a plots the average SSD lifetime consumed by the read-only workloads across 200 days on three SSDs (the detailed parameters of these SSDs can be found from SSD-A/-B/-C in Table 1). As shown in the figure, the lifetime consumed by the read (disturbance) induced writes increases significantly as the SSD density increases. In addition, increasing the read throughput (from 17MBps to 56/68MBps) can greatly accelerate the lifetime consumption. Even more problematically, as the density increases, the SSD lifetime (plotted in Figure 1b) decreases. In addition, SSD-aware write-reduction-oriented system software is no longer sufficient for high-density 3D SSDs, to reduce lifetime consumption. This is because the SSDs entered an era where one can wear out an SSD by simply reading it."

    " 3D NAND flash memory exhibits three new error sources that were not previously observed in planar NAND flash memory:

    (1) layer-to-layer process variation, 
    a new phenomenon specific to the 3D nature of the device, where the average error rate of each 3D-stacked layer in a chip is significantly different;

    (2) early retention loss, 
    a new phenomenon where the number of errors due to charge leakage increases quickly within several hours after programming; and

    (3) retention interference, 
    a new phenomenon where the rate at which charge leaks from a flash cell is dependent on the data value stored in the neighboring cell. "

[1] https://ghose.cs.illinois.edu/papers/18sigmetrics_3dflash.pd...

If you really want a modern SLC drive there's the Kioxia FL6, which has a whopping 350,400 TB of write endurance in the 3TB variant, but it'll cost you $4320. Alternatively you can get 4TB of TLC for $300 and take your chances with "only" 2400 TB endurance.

Perhaps there are techniques available to separate the traces, but this would ultimately increase the surface area? which seems to be something they are trying to avoid.

You should not use datacenter SSD disks as a reference, as they typically do not last more than two years and a half. It appears to be a profitable opportunity for the SSD manufacturer, and increasing longevity does not seem to be a priority.

To be more specific, we are talking about planned obsolescence for consumer and enterprise SSD disks.

> If you really want a modern SLC drive there's the Kioxia FL6, which has a whopping 350,400 TB of write endurance in the 3TB variant, but it'll cost you $4320.

Did you read the OP article?

(Caveat: that DMA trick doesn't work if you put the drive in a USB enclosure, so if that's your use-case you should ideally still look for a drive with its own DRAM)

The bit that you're pointedly ignoring and that none of your quotes address is the fact that SLC SSDs had far more longevity than anyone really needed. Sacrificing longevity to get higher capacity for the same price was the right tradeoff for consumers and almost all server use cases.

The fact that 3D NAND has some new mechanisms for data to be corrupted is pointless trivia on its own, bordering on fearmongering the way you're presenting it. The real impact these issues have on overall drive lifetime, compared to realistic estimates of how much lifespan people actually need from their drives, is not at all alarming.

Not using SLC is not insane. Insisting on using SLC everywhere is what's insane.

TLC is better than QLC, which is specifically what my comment was addressing; I never implied that it's better than SLC though, so just don't, please.

It's interesting to see that 3D-NAND has other issues even when run in SLC mode, though.

My apologies.

> It's interesting to see that 3D-NAND has other issues even when run in SLC mode, though.

Basically the SSD manufacturers are increasing capacity by adding more layers (3D-NAND). When one cell is read in the vertical stack, the interferences produced by the traces in the area increases the cells that need to be rewritten, what consumes the life of the device, by design.

You should try being honest about the magnitude of this effect. It takes thousands of read operations at a minimum to cause a read disturb that can be fixed with one write. What you're complaining about is the NAND equivalent of DRAM rowhammer. It's not a serious problem in practice.

Here, the dishonest are the SSD manufacturers of the last decade, and they are feeling so comfortable as to introduce QLC into the market.

> It's not a serious problem in practice.

It's as serious as in to read data consume the disk, and the faster its read the faster it's consumed [0]. You should have noticed that SSD disks no longer come with a 10-year warranty.

    "under low throughput read-only workloads, SSD-A/-B/-C/-D/-E/-F extensively rewrite the potentially-disturbed data in the background, to mitigate the read (disturbance) induced latency problem and sustain a good read performance. Such rewrites significantly consume the already-reduced SSD lifetime. "

It is a paper from 2021, what means sci-hub can be used to read it.

[0] https://dl.acm.org/doi/10.1145/3445814.3446733

Numbers, please. Quantify that or GTFO. You keep quoting stuff that implies SSDs are horrifically unreliable and burning through their write endurance alarmingly fast. But the reality is that even consumer PCs with cheap SSDs are not experiencing an epidemic of premature SSD failures.

EDIT:

> You should have noticed that SSD disks no longer come with a 10-year warranty.

10-year warranties were never common for SSDs. There was a brief span of time where the flagship consumer SSDs from Samsung and SanDisk had 10-year warranties because they were trying to one-up each other and couldn't improve performance any further because they had saturated what SATA was capable of. The fact that those 10-year warranties existed for a while and then went away says nothing about trends in the true reliability of the storage. SSD warranties and write endurance ratings are dictated primarily by marketing requirements.

Some of what you're spamming seems to directly undermine your claims, eg.:

> Another finding is that SLC (single level cell), the most costly drives, are NOT more reliable than MLC drives. And while the newest high density 3D-TLC (triple level cell) drives have the highest overall replacement rate, the difference is likely not caused by the 3D-TLC technology

> Would you care to explain how any of that supports the points you're actually making here?

Other day, if you don't mind.

So 3D-NAND suffers interference between the stacked layers? (Introducing Columnhammer... /s)

Macronix have known about the benefits of heating for a long time but previously used to bake NAND chips in an oven at around 250C for a few hours to anneal them – that’s an expensive and inconvenient thing to do for electronic components!

I wonder if the e-waste recycling operations in China may be doing that to "refurbish" worn out NAND flash and resell it. They already do harvesting of ICs so it doesn't seem impossible... and maybe this effect was first noticed by someone heating the chips to desolder them.

For example, if it had been DRAM where the data is stored as charge on a capacitor, then one could imagine using a R-2R ladder DAC to write the values and a flash ADC to read the values. In that case there would be no speed difference between how many effective levels was stored per cell (ignoring noise and such).

From what I can gather, the reason the pseudo-SLC mode is faster is down to how flash is programmed and read, and relies on the analog nature of flash memory.

Like DRAM there's still a charge that's being used to store the value, however it's not just in a plain capacitor but in a double MOSFET gate[1].

The amount of charge changes the effective threshold voltage of the transistor. Thus to read, one needs to apply different voltages to see when the transistor starts to conduct[2].

To program a cell, one has to inject some amount of charge that puts the threshold voltage to a given value depending on which bit pattern you want to program. Since one can only inject charge, one must be careful not to overshoot. Thus one uses a series of brief pulses and then do a read cycle to see if the required level has been reached or not[3], repeating as needed. Thus the more levels per cell, the shorter pulses are needed and more read cycles to ensure the required amount of charge is reached.

When programming the multi-level cell in single-level mode, you can get away with just a single, larger charge injection[4]. And when reading the value back, you just need to determine if the transistor conducts at a single level or not.

So to sum up, pseudo-SLC does not require changes to the multi-level cells as such, but it does require changes to how those cells are programmed and read. So most likely it requires changing those circuits somewhat, meaning you can't implement this just in firmware.

[1]: https://en.wikipedia.org/wiki/Flash_memory#Floating-gate_MOS...

[2]: https://dr.ntu.edu.sg/bitstream/10356/80559/1/Read%20and%20w...

[3]: https://people.engr.tamu.edu/ajiang/CellProgram.pdf

[4]: http://nyx.skku.ac.kr/publications/papers/ComboFTL.pdf

Hell, the Silicon Power NVMe SSD I have in my machine right now will use SLC for writes, then (presumably) move that data later to TLC during periods of inactivity. Running the NAND in SLC mode is a feature of these drives, it's called "SLC caching".

Sometimes TLC and QLC chips will be made in different sizes, so that each has the requisite number of memory cells to provide a capacity that's a power of two. But it's just as common for some of the chips to have an odd size, eg. Micron's first 3D NAND was sold as 256Gbit MLC or 384Gbit TLC (literally the same die), and more recently we've seen 1Tbit TLC and 1.33Tbit QLC parts from the same generation.

Put another way, you can turn a QLC into a TLC, but not the other way around.

Doing a Duck Duck Go search on the "SMI SM2259XT2 MPTool FIMN48 V0304A FWV0303B0" string in the article shows this place has the tool for download:

https://www.usbdev.ru/files/smi/sm2259xt2mptool/

The screenshot in the article looks to be captured from that site even. ;)

Naturally, be careful with anything downloaded from there.

The wide variety of controller/memory combinations makes it quite a moving target.

This is the "mass production" software that makes it possible to provision, partition, format, and even place pre-arranged data or OS's in position before shipping freshly prepared drives to a bulk OEM customer. On one or more "identical" drives at the same time.

For USB flash thumb drives the same approach is used. Factory software like this which is capable of modifying the firmware of the device is unfortunately about the only good way to determine the page size and erase block size of a particular USB drive. If the logical sectors storing your information are not aligned with the physical memory blocks (which somewhat correspond to the "obsolete" CHS geometry), the USB key will be slower than necessary, especially on writes. Due to write-amplification, and also it will wear out much sooner.

Care does not go into thumb drives like you would expect from SSDs, seems like very often a single SKU will have untold variations in controller/memory chips. Also it seems likely that during the production discontinuities when the supply of one of these ICs on the BOM becomes depleted, it is substituted with a dissimilar enough chip that a revision of the partitioning, formatting, and data layout would be advised, but does not take place because nobody does it. And it still works anyway so nobody notices or cares. Or worse, it's recognized as an engineering downgrade but downplayed as if in denial. Wide variation in performance within a single SKU is a canary for this, which can sometimes be rectified.

In any case, this is a feature that manufacturers should provide. I wonder how it could be obtained.